goal of pipelining is to approach 1 instruction per clock tick

superpipelining (deeply pipelined microprocessors) superscalar (multiple issue, multiple instruction dispatch, multiple concurrent pipelines) superscalar (multiple issue) origins Modern Superscalar Crossing the Threshold Between single and multiple issue Implications of Multiple Issue Limits to Superscalar (multiple issue) microprocessors Maximum ILP ILP: Two techniques to identify hazards: Scoreboard Scoreboard Contents Result Register Designator Result Register Dependencies Forwarding